High Frequency Server
The selection depends on distance, data rate, cost, and power consumption requirements:
|
Transmission Type |
Distance |
Cost |
Power Consumption |
Key Features |
| DAC | < 2m | Low | Low | Cost-effective; ideal for short in-rack connections |
| AEC | 2–7m | Mid | Mid | Equipped with equalization and loss compensation; excellent stability |
| AOC | > 7m | High | Low | Supports long-distance, high-frequency transmission with strong EMI resistance |
For AI server-to-switch connections, AOC is recommended; within the rack, DAC or AEC is typically used to balance performance and cost.
In high-speed signal transmission, Signal Integrity (SI) is critical. Materials such as FEP and expanded ePTFE offer key advantages that make them the preferred choice for high-speed cables:
- Low dielectric constant (Dk) and low dissipation factor (Df): Reduce signal loss and maintain a clear eye diagram.
- Excellent thermal and chemical stability: Suitable for high-temperature environments.
-
High processing stability: Enables precise impedance control and consistent pair matching.
PVC, with higher Dk/Df, cannot support ultra-high-speed applications such as PCIe 5.0 / 6.0 or 800G Ethernet.
Some high-speed connectors (e.g., MCIO) offer backward compatibility, but require matching pin mapping and precise PCB layout.
As connector density increases, routing space becomes more limited. Designing for backward compatibility can increase the risk of mechanical interference and SI degradation, so it must be considered early in the design stage.
For AI GPU systems, we recommend:
- MCIO 16X to 8X×2 (Fanout) Cable
- MCIO 16X to Riser Card
These should be paired with a 100Ω twinax structure, skew adjustment, and SI validation. If the cable length exceeds 500 mm, AEC or AOC is recommended to maintain stability.
We recommend using standardized high-speed interface cables such as:
- MCIO, SFF-TA-1016, SFF-TA-1032
- PCIe Gen5/6 compliant and SI-tested (Eye Diagram, Insertion Loss, Return Loss)
Multiple suppliers, including Amphenol, Molex, JPC Connectivity, and ACES, offer compatible products to support cloud data center deployments.
At frequencies above 10 GHz, even the slightest geometric variation can alter impedance, increasing return loss and insertion loss. For example, a 100 Ω differential cable deviating by ±5 Ω may cause eye diagram closure or higher bit error rates (BER). To maintain stable signal integrity, the manufacturing process must tightly control differential spacing, insulation thickness, and conductor symmetry. High-precision crimping dies and X-ray inspection are used to ensure impedance remains within the design tolerance range.
The transition zone refers to the structural region where the cable connects to the connector. In this area, the signal transitions from flexible twisted pairs to connector pin pads, creating a significant geometric change that often leads to impedance discontinuities and reflections. To ensure signal integrity, electromagnetic simulation tools such as HFSS or CST should be used during the design phase to verify impedance continuity. Using copper plating or conductive adhesive can also enhance grounding continuity and reduce high-frequency loss and common-mode noise.
When the differential pair traces have unequal lengths, signal arrival times differ, resulting in phase delay and eye diagram distortion. This timing difference, known as skew, must be kept within 5 ps (≈ 0.5 mm) for data rates above 25 Gbps. To minimize skew, each pair should be precisely measured and fixed before processing. During bending or routing, both conductors should be handled in the same direction and under equal tension to maintain signal synchronization and stability.
Poor return loss after assembly often results from improper transition zone design or processing errors that cause impedance discontinuities. Examples include excessive solder penetration, overly long crimp zones, or poor grounding of the shielding layer. It is recommended to perform 3D electromagnetic simulations (HFSS or CST) during the design phase and strictly control solder length and joint geometry during production to ensure smooth structural transitions and reliable high-frequency performance.
During soldering or heat-shrinking, excessive or uneven heating can deform the insulation, altering the conductor spacing and causing impedance discontinuities. This effect becomes especially critical above 20 GHz. To maintain impedance stability, soldering temperature and duration should be carefully controlled, and jigs should be used to fix the cable in place. These measures reduce reflection and insertion loss, improving signal integrity and reliability.
Excessive bending can distort the conductor spacing and shield structure, causing impedance discontinuities and signal loss. It is recommended to maintain a minimum bend radius of 10 × the cable outer diameter, and use guide plates during assembly to avoid sharp bends, ensuring consistent high-speed transmission.
Variations in S-parameters typically arise from material and process tolerances. Differences in dielectric constant (Dk), dissipation factor (Df), or insulation thickness can alter transmission characteristics. To ensure consistency, use low-loss materials such as FEP or ePTFE, strictly manage supplier batches, and record S-parameters for each lot to maintain stable electrical performance and signal integrity.